An investigation into some critical computer networking parameters : Internet addressing and routing
- Authors: Isted, Edwin David
- Date: 1996
- Subjects: Computer networks , Internet , Electronic mail systems
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4608 , http://hdl.handle.net/10962/d1004874 , Computer networks , Internet , Electronic mail systems
- Description: This thesis describes the evaluation of several proposals suggested as replacements for the currenT Internet's TCPJIP protocol suite. The emphasis of this thesis is on how the proposals solve the current routing and addressing problems associated with the Internet. The addressing problem is found to be related to address space depletion, and the routing problem related to excessive routing costs. The evaluation is performed based on criteria selected for their applicability as future Internet design criteria. AIl the protocols are evaluated using the above-mentioned criteria. It is concluded that the most suitable addressing mechanism is an expandable multi-level format, with a logical separation of location and host identification information. Similarly, the most suitable network representation technique is found to be an unrestricted hierarchical structure which uses a suitable abstraction mechanism. It is further found that these two solutions could adequately solve the existing addressing and routing problems and allow substantial growth of the Internet.
- Full Text:
An investigation into some critical computer networking parameters : Internet addressing and routing
- Authors: Isted, Edwin David
- Date: 1996
- Subjects: Computer networks , Internet , Electronic mail systems
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4608 , http://hdl.handle.net/10962/d1004874 , Computer networks , Internet , Electronic mail systems
- Description: This thesis describes the evaluation of several proposals suggested as replacements for the currenT Internet's TCPJIP protocol suite. The emphasis of this thesis is on how the proposals solve the current routing and addressing problems associated with the Internet. The addressing problem is found to be related to address space depletion, and the routing problem related to excessive routing costs. The evaluation is performed based on criteria selected for their applicability as future Internet design criteria. AIl the protocols are evaluated using the above-mentioned criteria. It is concluded that the most suitable addressing mechanism is an expandable multi-level format, with a logical separation of location and host identification information. Similarly, the most suitable network representation technique is found to be an unrestricted hierarchical structure which uses a suitable abstraction mechanism. It is further found that these two solutions could adequately solve the existing addressing and routing problems and allow substantial growth of the Internet.
- Full Text:
Virtual sculpting : an investigation of directly manipulated free-form deformation in a virtual environment
- Authors: Gain, James Edward
- Date: 1996
- Subjects: Computer simulation , Computer graphics , Virtual reality
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4660 , http://hdl.handle.net/10962/d1006661 , Computer simulation , Computer graphics , Virtual reality
- Description: This thesis presents a Virtual Sculpting system, which addresses the problem of Free-Form Solid Modelling. The disparate elements of a Polygon-Mesh representation, a Directly Manipulated Free-Form Deformation sculpting tool, and a Virtual Environment are drawn into a cohesive whole under the mantle of a clay-sculpting metaphor. This enables a user to mould and manipulate a synthetic solid interactively as if it were composed of malleable clay. The focus of this study is on the interactivity, intuitivity and versatility of such a system. To this end, a range of improvements is investigated which significantly enhances the efficiency and correctness of Directly Manipulated Free-Form Deformation, both separately and as a seamless component of the Virtual Sculpting system.
- Full Text:
- Authors: Gain, James Edward
- Date: 1996
- Subjects: Computer simulation , Computer graphics , Virtual reality
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4660 , http://hdl.handle.net/10962/d1006661 , Computer simulation , Computer graphics , Virtual reality
- Description: This thesis presents a Virtual Sculpting system, which addresses the problem of Free-Form Solid Modelling. The disparate elements of a Polygon-Mesh representation, a Directly Manipulated Free-Form Deformation sculpting tool, and a Virtual Environment are drawn into a cohesive whole under the mantle of a clay-sculpting metaphor. This enables a user to mould and manipulate a synthetic solid interactively as if it were composed of malleable clay. The focus of this study is on the interactivity, intuitivity and versatility of such a system. To this end, a range of improvements is investigated which significantly enhances the efficiency and correctness of Directly Manipulated Free-Form Deformation, both separately and as a seamless component of the Virtual Sculpting system.
- Full Text:
Remora : implementing adaptive parallelism on a heterogeneous cluster of networked workstations
- Authors: Rehmet, Geoffrey Michael
- Date: 1995
- Subjects: LINDA (Computer system) , Local area networks (Computer networks) , Computer networks , Remora (Computer system)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4673 , http://hdl.handle.net/10962/d1006696 , LINDA (Computer system) , Local area networks (Computer networks) , Computer networks , Remora (Computer system)
- Description: Computers connected to a local area network are often only fully utilized for short periods of time. In fact, most workstations are not used at all for a significant portion of the day. The combined "idle time" of the workstations on a network constitutes a significant computing resource, which is generally wasted. If harnessed properly, such a resource could constitute a cheap alternative to expensive high-performance computers. Adaptive parallelism refers to the parallel execution of a computation on a dynamically changing set of processors. This thesis investigates the viability of this approach as a vehicle to harness the "idle cycles" available on a heterogeneous cluster of networked computers. A system, called Remora, which implements adaptive parallelism via the Linda programming paradigm, is presented. Experiments, performed using Remora, show that adaptive parallelism provides an efficient vehicle for using idle processor cycles, without having an adverse effect on the tasks which constitute the normal workload of the computers being used.
- Full Text:
- Authors: Rehmet, Geoffrey Michael
- Date: 1995
- Subjects: LINDA (Computer system) , Local area networks (Computer networks) , Computer networks , Remora (Computer system)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4673 , http://hdl.handle.net/10962/d1006696 , LINDA (Computer system) , Local area networks (Computer networks) , Computer networks , Remora (Computer system)
- Description: Computers connected to a local area network are often only fully utilized for short periods of time. In fact, most workstations are not used at all for a significant portion of the day. The combined "idle time" of the workstations on a network constitutes a significant computing resource, which is generally wasted. If harnessed properly, such a resource could constitute a cheap alternative to expensive high-performance computers. Adaptive parallelism refers to the parallel execution of a computation on a dynamically changing set of processors. This thesis investigates the viability of this approach as a vehicle to harness the "idle cycles" available on a heterogeneous cluster of networked computers. A system, called Remora, which implements adaptive parallelism via the Linda programming paradigm, is presented. Experiments, performed using Remora, show that adaptive parallelism provides an efficient vehicle for using idle processor cycles, without having an adverse effect on the tasks which constitute the normal workload of the computers being used.
- Full Text:
Routing MIDI messages in a shared music studio environment
- Authors: Mosala, Thabo Jerry
- Date: 1995
- Subjects: MIDI (Standard) , Computer networks
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4672 , http://hdl.handle.net/10962/d1006695 , MIDI (Standard) , Computer networks
- Description: The Rhodes Computer Music Network (RHOCMN) is a network which allows main studio resources to be shared. RHOCMN is growing into a multi-workstation environment and additional devices are being incorporated into the system. A star configuration is used for transmitting MIDI from a MIDI patch bay to the workstations and MIDI devices. This imposes several disadvantages on the use of the studio, such as wiring problems. In a quest to avoid problems related to MIDI in RHOCMN, the MIDINet system was developed. The idea was to acquire a viable solution to MIDI's main problems which does not involve a redefinition of the MIDI specification.
- Full Text:
- Authors: Mosala, Thabo Jerry
- Date: 1995
- Subjects: MIDI (Standard) , Computer networks
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4672 , http://hdl.handle.net/10962/d1006695 , MIDI (Standard) , Computer networks
- Description: The Rhodes Computer Music Network (RHOCMN) is a network which allows main studio resources to be shared. RHOCMN is growing into a multi-workstation environment and additional devices are being incorporated into the system. A star configuration is used for transmitting MIDI from a MIDI patch bay to the workstations and MIDI devices. This imposes several disadvantages on the use of the studio, such as wiring problems. In a quest to avoid problems related to MIDI in RHOCMN, the MIDINet system was developed. The idea was to acquire a viable solution to MIDI's main problems which does not involve a redefinition of the MIDI specification.
- Full Text:
The analysis of a computer music network and the implementation of essential subsystems
- Authors: Wilks, Antony John
- Date: 1995
- Subjects: Computer networks , Computer music , MIDI (Standard)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4666 , http://hdl.handle.net/10962/d1006682 , Computer networks , Computer music , MIDI (Standard)
- Description: The inability to share resources in commercial and institutional computer music studios results in non-optimal resource utilisation. The use of computers to process, store and communicate data can be extended within these studios, to provide the capability of sharing resources amongst their users. This thesis describes a computer music network which was designed for this purpose. Certain devices had to be custom built for the implementation of the network. The thesis discusses the design and construction of these devices.
- Full Text:
- Authors: Wilks, Antony John
- Date: 1995
- Subjects: Computer networks , Computer music , MIDI (Standard)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4666 , http://hdl.handle.net/10962/d1006682 , Computer networks , Computer music , MIDI (Standard)
- Description: The inability to share resources in commercial and institutional computer music studios results in non-optimal resource utilisation. The use of computers to process, store and communicate data can be extended within these studios, to provide the capability of sharing resources amongst their users. This thesis describes a computer music network which was designed for this purpose. Certain devices had to be custom built for the implementation of the network. The thesis discusses the design and construction of these devices.
- Full Text:
Behavioural model debugging in Linda
- Authors: Sewry, David Andrew
- Date: 1994
- Subjects: LINDA (Computer system) Debugging in computer science
- Language: English
- Type: Thesis , Doctoral , PhD
- Identifier: vital:4674 , http://hdl.handle.net/10962/d1006697
- Description: This thesis investigates event-based behavioural model debugging in Linda. A study is presented of the Linda parallel programming paradigm, its amenability to debugging, and a model for debugging Linda programs using Milner's CCS. In support of the construction of expected behaviour models, a Linda program specification language is proposed. A behaviour recognition engine that is based on such specifications is also discussed. It is shown that Linda's distinctive characteristics make it amenable to debugging without the usual problems associated with paraUel debuggers. Furthermore, it is shown that a behavioural model debugger, based on the proposed specification language, effectively exploits the debugging opportunity. The ideas developed in the thesis are demonstrated in an experimental Modula-2 Linda system.
- Full Text:
- Authors: Sewry, David Andrew
- Date: 1994
- Subjects: LINDA (Computer system) Debugging in computer science
- Language: English
- Type: Thesis , Doctoral , PhD
- Identifier: vital:4674 , http://hdl.handle.net/10962/d1006697
- Description: This thesis investigates event-based behavioural model debugging in Linda. A study is presented of the Linda parallel programming paradigm, its amenability to debugging, and a model for debugging Linda programs using Milner's CCS. In support of the construction of expected behaviour models, a Linda program specification language is proposed. A behaviour recognition engine that is based on such specifications is also discussed. It is shown that Linda's distinctive characteristics make it amenable to debugging without the usual problems associated with paraUel debuggers. Furthermore, it is shown that a behavioural model debugger, based on the proposed specification language, effectively exploits the debugging opportunity. The ideas developed in the thesis are demonstrated in an experimental Modula-2 Linda system.
- Full Text:
Cogitator : a parallel, fuzzy, database-driven expert system
- Authors: Baise, Paul
- Date: 1994 , 2012-10-08
- Subjects: Expert systems (Computer science) , Artificial intelligence -- Computer programs , System design , Cogitator (Computer system)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4667 , http://hdl.handle.net/10962/d1006684 , Expert systems (Computer science) , Artificial intelligence -- Computer programs , System design , Cogitator (Computer system)
- Description: The quest to build anthropomorphic machines has led researchers to focus on knowledge and the manipulation thereof. Recently, the expert system was proposed as a solution, working well in small, well understood domains. However these initial attempts highlighted the tedious process associated with building systems to display intelligence, the most notable being the Knowledge Acquisition Bottleneck. Attempts to circumvent this problem have led researchers to propose the use of machine learning databases as a source of knowledge. Attempts to utilise databases as sources of knowledge has led to the development Database-Driven Expert Systems. Furthermore, it has been ascertained that a requisite for intelligent systems is powerful computation. In response to these problems and proposals, a new type of database-driven expert system, Cogitator is proposed. It is shown to circumvent the Knowledge Acquisition Bottleneck and posess many other advantages over both traditional expert systems and connectionist systems, whilst having non-serious disadvantages. , KMBT_223
- Full Text:
- Authors: Baise, Paul
- Date: 1994 , 2012-10-08
- Subjects: Expert systems (Computer science) , Artificial intelligence -- Computer programs , System design , Cogitator (Computer system)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4667 , http://hdl.handle.net/10962/d1006684 , Expert systems (Computer science) , Artificial intelligence -- Computer programs , System design , Cogitator (Computer system)
- Description: The quest to build anthropomorphic machines has led researchers to focus on knowledge and the manipulation thereof. Recently, the expert system was proposed as a solution, working well in small, well understood domains. However these initial attempts highlighted the tedious process associated with building systems to display intelligence, the most notable being the Knowledge Acquisition Bottleneck. Attempts to circumvent this problem have led researchers to propose the use of machine learning databases as a source of knowledge. Attempts to utilise databases as sources of knowledge has led to the development Database-Driven Expert Systems. Furthermore, it has been ascertained that a requisite for intelligent systems is powerful computation. In response to these problems and proposals, a new type of database-driven expert system, Cogitator is proposed. It is shown to circumvent the Knowledge Acquisition Bottleneck and posess many other advantages over both traditional expert systems and connectionist systems, whilst having non-serious disadvantages. , KMBT_223
- Full Text:
Parallel implementation of a virtual reality system on a transputer architecture
- Authors: Bangay, Shaun Douglas
- Date: 1994 , 2012-10-11
- Subjects: Virtual reality , Computer simulation , Transputers
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4668 , http://hdl.handle.net/10962/d1006687 , Virtual reality , Computer simulation , Transputers
- Description: A Virtual Reality is a computer model of an environment, actual or imagined, presented to a user in as realistic a fashion as possible. Stereo goggles may be used to provide the user with a view of the modelled environment from within the environment, while a data-glove is used to interact with the environment. To simulate reality on a computer, the machine has to produce realistic images rapidly. Such a requirement usually necessitates expensive equipment. This thesis presents an implementation of a virtual reality system on a transputer architecture. The system is general, and is intended to provide support for the development of various virtual environments. The three main components of the system are the output device drivers, the input device drivers, and the virtual world kernel. This last component is responsible for the simulation of the virtual world. The rendering system is described in detail. Various methods for implementing the components of the graphics pipeline are discussed. These are then generalised to make use of the facilities provided by the transputer processor for parallel processing. A number of different decomposition techniques are implemented and compared. The emphasis in this section is on the speed at which the world can be rendered, and the interaction latency involved. In the best case, where almost linear speedup is obtained, a world containing over 250 polygons is rendered at 32 frames/second. The bandwidth of the transputer links is the major factor limiting speedup. A description is given of an input device driver which makes use of a powerglove. Techniques for overcoming the limitations of this device, and for interacting with the virtual world, are discussed. The virtual world kernel is designed to make extensive use of the parallel processing facilities provided by transputers. It is capable of providing support for mUltiple worlds concurrently, and for multiple users interacting with these worlds. Two applications are described that were successfully implemented using this system. The design of the system is compared with other recently developed virtual reality systems. Features that are common or advantageous in each of the systems are discussed. The system described in this thesis compares favourably, particularly in its use of parallel processors. , KMBT_223
- Full Text:
- Authors: Bangay, Shaun Douglas
- Date: 1994 , 2012-10-11
- Subjects: Virtual reality , Computer simulation , Transputers
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4668 , http://hdl.handle.net/10962/d1006687 , Virtual reality , Computer simulation , Transputers
- Description: A Virtual Reality is a computer model of an environment, actual or imagined, presented to a user in as realistic a fashion as possible. Stereo goggles may be used to provide the user with a view of the modelled environment from within the environment, while a data-glove is used to interact with the environment. To simulate reality on a computer, the machine has to produce realistic images rapidly. Such a requirement usually necessitates expensive equipment. This thesis presents an implementation of a virtual reality system on a transputer architecture. The system is general, and is intended to provide support for the development of various virtual environments. The three main components of the system are the output device drivers, the input device drivers, and the virtual world kernel. This last component is responsible for the simulation of the virtual world. The rendering system is described in detail. Various methods for implementing the components of the graphics pipeline are discussed. These are then generalised to make use of the facilities provided by the transputer processor for parallel processing. A number of different decomposition techniques are implemented and compared. The emphasis in this section is on the speed at which the world can be rendered, and the interaction latency involved. In the best case, where almost linear speedup is obtained, a world containing over 250 polygons is rendered at 32 frames/second. The bandwidth of the transputer links is the major factor limiting speedup. A description is given of an input device driver which makes use of a powerglove. Techniques for overcoming the limitations of this device, and for interacting with the virtual world, are discussed. The virtual world kernel is designed to make extensive use of the parallel processing facilities provided by transputers. It is capable of providing support for mUltiple worlds concurrently, and for multiple users interacting with these worlds. Two applications are described that were successfully implemented using this system. The design of the system is compared with other recently developed virtual reality systems. Features that are common or advantageous in each of the systems are discussed. The system described in this thesis compares favourably, particularly in its use of parallel processors. , KMBT_223
- Full Text:
Static analysis of functional languages
- Authors: Mountjoy, Jon-Dean
- Date: 1994 , 2012-10-10
- Subjects: Functional programming languages
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4669 , http://hdl.handle.net/10962/d1006690 , Functional programming languages
- Description: Static analysis is the name given to a number of compile time analysis techniques used to automatically generate information which can lead to improvements in the execution performance of function languages. This thesis provides an introduction to these techniques and their implementation. The abstract interpretation framework is an example of a technique used to extract information from a program by providing the program with an alternate semantics and evaluating this program over a non-standard domain. The elements of this domain represent certain properties of interest. This framework is examined in detail, as well as various extensions and variants of it. The use of binary logical relations and program logics as alternative formulations of the framework , and partial equivalence relations as an extension to it, are also looked at. The projection analysis framework determines how much of a sub-expression can be evaluated by examining the context in which the expression is to be evaluated, and provides an elegant method for finding particular types of information from data structures. This is also examined. The most costly operation in implementing an analysis is the computation of fixed points. Methods developed to make this process more efficient are looked at. This leads to the final chapter which highlights the dependencies and relationships between the different frameworks and their mathematical disciplines. , KMBT_223
- Full Text:
- Authors: Mountjoy, Jon-Dean
- Date: 1994 , 2012-10-10
- Subjects: Functional programming languages
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4669 , http://hdl.handle.net/10962/d1006690 , Functional programming languages
- Description: Static analysis is the name given to a number of compile time analysis techniques used to automatically generate information which can lead to improvements in the execution performance of function languages. This thesis provides an introduction to these techniques and their implementation. The abstract interpretation framework is an example of a technique used to extract information from a program by providing the program with an alternate semantics and evaluating this program over a non-standard domain. The elements of this domain represent certain properties of interest. This framework is examined in detail, as well as various extensions and variants of it. The use of binary logical relations and program logics as alternative formulations of the framework , and partial equivalence relations as an extension to it, are also looked at. The projection analysis framework determines how much of a sub-expression can be evaluated by examining the context in which the expression is to be evaluated, and provides an elegant method for finding particular types of information from data structures. This is also examined. The most costly operation in implementing an analysis is the computation of fixed points. Methods developed to make this process more efficient are looked at. This leads to the final chapter which highlights the dependencies and relationships between the different frameworks and their mathematical disciplines. , KMBT_223
- Full Text:
Studies related to the process of program development
- Authors: Williams, Morgan Howard
- Date: 1994
- Subjects: Computer programming
- Language: English
- Type: Thesis , Doctoral , DSc
- Identifier: vital:4680 , http://hdl.handle.net/10962/d1007235
- Description: The submitted work consists of a collection of publications arising from research carried out at Rhodes University (1970-1980) and at Heriot-Watt University (1980-1992). The theme of this research is the process of program development, i.e. the process of creating a computer program to solve some particular problem. The papers presented cover a number of different topics which relate to this process, viz. (a) Programming methodology programming. (b) Properties of programming languages. aspects of structured. (c) Formal specification of programming languages. (d) Compiler techniques. (e) Declarative programming languages. (f) Program development aids. (g) Automatic program generation. (h) Databases. (i) Algorithms and applications.
- Full Text:
- Authors: Williams, Morgan Howard
- Date: 1994
- Subjects: Computer programming
- Language: English
- Type: Thesis , Doctoral , DSc
- Identifier: vital:4680 , http://hdl.handle.net/10962/d1007235
- Description: The submitted work consists of a collection of publications arising from research carried out at Rhodes University (1970-1980) and at Heriot-Watt University (1980-1992). The theme of this research is the process of program development, i.e. the process of creating a computer program to solve some particular problem. The papers presented cover a number of different topics which relate to this process, viz. (a) Programming methodology programming. (b) Properties of programming languages. aspects of structured. (c) Formal specification of programming languages. (d) Compiler techniques. (e) Declarative programming languages. (f) Program development aids. (g) Automatic program generation. (h) Databases. (i) Algorithms and applications.
- Full Text:
A distributed Linda server on a network of heterogeneous processors
- Authors: Smith, Graham Leslie
- Date: 1993
- Subjects: LINDA (Computer system) , Parallel programming (Computer science)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4610 , http://hdl.handle.net/10962/d1004890 , LINDA (Computer system) , Parallel programming (Computer science)
- Description: Linda is an approach to parallelism which relies on a virtual associative shared memory called tuple space. Tuple space is accessed through a small set of primitive operations and is conceptually easy to understand and manipulate. The physical implementation of a Linda tuple space may of course be completely different from the conceptual model. Rhodes has implemented versions of Linda on a ring of RS-232 joined PC's and on a cluster of T800 transputers with a single copy of tuple space on one transputer. Current research targets the implementation of a distributed Linda server on a network of heterogeneous processors. This work describes the design and implementation of a distributed Linda server. Emphasis is placed on aspects of the design which enhance portability and efficiency.
- Full Text:
- Authors: Smith, Graham Leslie
- Date: 1993
- Subjects: LINDA (Computer system) , Parallel programming (Computer science)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4610 , http://hdl.handle.net/10962/d1004890 , LINDA (Computer system) , Parallel programming (Computer science)
- Description: Linda is an approach to parallelism which relies on a virtual associative shared memory called tuple space. Tuple space is accessed through a small set of primitive operations and is conceptually easy to understand and manipulate. The physical implementation of a Linda tuple space may of course be completely different from the conceptual model. Rhodes has implemented versions of Linda on a ring of RS-232 joined PC's and on a cluster of T800 transputers with a single copy of tuple space on one transputer. Current research targets the implementation of a distributed Linda server on a network of heterogeneous processors. This work describes the design and implementation of a distributed Linda server. Emphasis is placed on aspects of the design which enhance portability and efficiency.
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Algorithmic skeletons as a method of parallel programming
- Authors: Watkins, Rees Collyer
- Date: 1993
- Subjects: Parallel programming (Computer science) , Algorithms
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4609 , http://hdl.handle.net/10962/d1004889 , Parallel programming (Computer science) , Algorithms
- Description: A new style of abstraction for program development, based on the concept of algorithmic skeletons, has been proposed in the literature. The programmer is offered a variety of independent algorithmic skeletons each of which describe the structure of a particular style of algorithm. The appropriate skeleton is used by the system to mould the solution. Parallel programs are particularly appropriate for this technique because of their complexity. This thesis investigates algorithmic skeletons as a method of hiding the complexities of parallel programming from the user, and for guiding them towards efficient solutions. To explore this approach, this thesis describes the implementation and benchmarking of the divide and conquer and task queue paradigms as skeletons. All but one category of problem, as implemented in this thesis, scale well over eight processors. The rate of speed up tails off when there are significant communication requirements. The results show that, with some user knowledge, efficient parallel programs can be developed using this method. The evaluation explores methods for fine tuning some skeleton programs to achieve increased efficiency.
- Full Text:
- Authors: Watkins, Rees Collyer
- Date: 1993
- Subjects: Parallel programming (Computer science) , Algorithms
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4609 , http://hdl.handle.net/10962/d1004889 , Parallel programming (Computer science) , Algorithms
- Description: A new style of abstraction for program development, based on the concept of algorithmic skeletons, has been proposed in the literature. The programmer is offered a variety of independent algorithmic skeletons each of which describe the structure of a particular style of algorithm. The appropriate skeleton is used by the system to mould the solution. Parallel programs are particularly appropriate for this technique because of their complexity. This thesis investigates algorithmic skeletons as a method of hiding the complexities of parallel programming from the user, and for guiding them towards efficient solutions. To explore this approach, this thesis describes the implementation and benchmarking of the divide and conquer and task queue paradigms as skeletons. All but one category of problem, as implemented in this thesis, scale well over eight processors. The rate of speed up tails off when there are significant communication requirements. The results show that, with some user knowledge, efficient parallel programs can be developed using this method. The evaluation explores methods for fine tuning some skeleton programs to achieve increased efficiency.
- Full Text:
Analyzing communication flow and process placement in Linda programs on transputers
- De-Heer-Menlah, Frederick Kofi
- Authors: De-Heer-Menlah, Frederick Kofi
- Date: 1992 , 2012-11-28
- Subjects: LINDA (Computer system) , Transputers , Parallel programming (Computer science)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4675 , http://hdl.handle.net/10962/d1006698 , LINDA (Computer system) , Transputers , Parallel programming (Computer science)
- Description: With the evolution of parallel and distributed systems, users from diverse disciplines have looked to these systems as a solution to their ever increasing needs for computer processing resources. Because parallel processing systems currently require a high level of expertise to program, many researchers are investing effort into developing programming approaches which hide some of the difficulties of parallel programming from users. Linda, is one such parallel paradigm, which is intuitive to use, and which provides a high level decoupling between distributable components of parallel programs. In Linda, efficiency becomes a concern of the implementation rather than of the programmer. There is a substantial overhead in implementing Linda, an inherently shared memory model on a distributed system. This thesis describes the compile-time analysis of tuple space interactions which reduce the run-time matching costs, and permits the distributon of the tuple space data. A language independent module which partitions the tuple space data and suggests appropriate storage schemes for the partitions so as to optimise Linda operations is presented. The thesis also discusses hiding the network topology from the user by automatically allocating Linda processes and tuple space partitons to nodes in the network of transputers. This is done by introducing a fast placement algorithm developed for Linda. , KMBT_223
- Full Text:
- Authors: De-Heer-Menlah, Frederick Kofi
- Date: 1992 , 2012-11-28
- Subjects: LINDA (Computer system) , Transputers , Parallel programming (Computer science)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4675 , http://hdl.handle.net/10962/d1006698 , LINDA (Computer system) , Transputers , Parallel programming (Computer science)
- Description: With the evolution of parallel and distributed systems, users from diverse disciplines have looked to these systems as a solution to their ever increasing needs for computer processing resources. Because parallel processing systems currently require a high level of expertise to program, many researchers are investing effort into developing programming approaches which hide some of the difficulties of parallel programming from users. Linda, is one such parallel paradigm, which is intuitive to use, and which provides a high level decoupling between distributable components of parallel programs. In Linda, efficiency becomes a concern of the implementation rather than of the programmer. There is a substantial overhead in implementing Linda, an inherently shared memory model on a distributed system. This thesis describes the compile-time analysis of tuple space interactions which reduce the run-time matching costs, and permits the distributon of the tuple space data. A language independent module which partitions the tuple space data and suggests appropriate storage schemes for the partitions so as to optimise Linda operations is presented. The thesis also discusses hiding the network topology from the user by automatically allocating Linda processes and tuple space partitons to nodes in the network of transputers. This is done by introducing a fast placement algorithm developed for Linda. , KMBT_223
- Full Text:
The synthesis of sound with application in a MIDI environment
- Authors: Kesterton, Anthony James
- Date: 1991
- Subjects: Computer sound processing -- Research , Music -- Data processing -- Research , MIDI (Standard)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4678 , http://hdl.handle.net/10962/d1006701 , Computer sound processing -- Research , Music -- Data processing -- Research , MIDI (Standard)
- Description: The wide range of options for experimentation with the synthesis of sound are usually expensive, difficult to obtain, or limit the experimenter. The work described in this thesis shows how the IBM PC and software can be combined to provide a suitable platform for experimentation with different synthesis techniques. This platform is based on the PC, the Musical Instrument Digital Interface (MIDI) and a musical instrument called a digital sampler. The fundamental concepts of sound are described, with reference to digital sound reproduction. A number of synthesis techniques are described. These are evaluated according to the criteria of generality, efficiency and control. The techniques discussed are additive synthesis, frequency modulation synthesis, subtractive synthesis, granular synthesis, resynthesis, wavetable synthesis, and sampling. Spiral synthesis, physical modelling, waveshaping and spectral interpolation are discussed briefly. The Musical Instrument Digital Interface is a standard method of connecting digital musical instruments together. It is the MIDI standard and equipment conforming to that standard that makes this implementation of synthesis techniques possible. As a demonstration of the PC platform, additive synthesis, frequency modulation synthesis, granular synthesis and spiral synthesis have been implemented in software. A PC equipped with a MIDI interface card is used to perform the synthesis. The MIDI protocol is used to transmit the resultant sound to a digital sampler. The INMOS transputer is used as an accelerator, as the calculation of a waveform using software is a computational intensive process. It is concluded that sound synthesis can be performed successfully using a PC and the appropriate software, and utilizing the facilities provided by a MIDI environment including a digital sampler.
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- Authors: Kesterton, Anthony James
- Date: 1991
- Subjects: Computer sound processing -- Research , Music -- Data processing -- Research , MIDI (Standard)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4678 , http://hdl.handle.net/10962/d1006701 , Computer sound processing -- Research , Music -- Data processing -- Research , MIDI (Standard)
- Description: The wide range of options for experimentation with the synthesis of sound are usually expensive, difficult to obtain, or limit the experimenter. The work described in this thesis shows how the IBM PC and software can be combined to provide a suitable platform for experimentation with different synthesis techniques. This platform is based on the PC, the Musical Instrument Digital Interface (MIDI) and a musical instrument called a digital sampler. The fundamental concepts of sound are described, with reference to digital sound reproduction. A number of synthesis techniques are described. These are evaluated according to the criteria of generality, efficiency and control. The techniques discussed are additive synthesis, frequency modulation synthesis, subtractive synthesis, granular synthesis, resynthesis, wavetable synthesis, and sampling. Spiral synthesis, physical modelling, waveshaping and spectral interpolation are discussed briefly. The Musical Instrument Digital Interface is a standard method of connecting digital musical instruments together. It is the MIDI standard and equipment conforming to that standard that makes this implementation of synthesis techniques possible. As a demonstration of the PC platform, additive synthesis, frequency modulation synthesis, granular synthesis and spiral synthesis have been implemented in software. A PC equipped with a MIDI interface card is used to perform the synthesis. The MIDI protocol is used to transmit the resultant sound to a digital sampler. The INMOS transputer is used as an accelerator, as the calculation of a waveform using software is a computational intensive process. It is concluded that sound synthesis can be performed successfully using a PC and the appropriate software, and utilizing the facilities provided by a MIDI environment including a digital sampler.
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A study of real-time operating systems for microcomputers
- Authors: Wells, George Clifford
- Date: 1990
- Subjects: Operating systems (Computers) , Microcomputers
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4611 , http://hdl.handle.net/10962/d1004896 , Operating systems (Computers) , Microcomputers
- Description: This thesis describes the evaluation of four operating systems for microcomputers. The emphasis of the study is on the suitability of the operating systems for use in real-time applications, such as process control. The evaluation was performed in two sections. The first section was a quantitative assessment of the performance of the real-time features of the operating system. This was performed using benchmarks. The criteria for the benchmarks and their design are discussed. The second section was a qualitative assessment of the suitability of the operating systems for the development and implementation of real-time systems. This was assessed through the implementation of a small simulation of a manufacturing process and its associated control system. The simulation was designed using the Ward and Mellor real-time design method which was extended to handle the special case of a real-time simulation. The operating systems which were selected for the study covered a spectrum from general purpose operating systems to small, specialised real-time operating systems. From the quantitative assessment it emerged that QNX (from Quantum Software Systems) had the best overall performance. Qualitatively, UNIX was found to offer the best system development environment, but it does not have the performance and the characteristics required for real-time applications. This suggests that versions of UNIX that are adapted for real-time applications are worth careful consideration for use both as development systems and implementation systems.
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- Authors: Wells, George Clifford
- Date: 1990
- Subjects: Operating systems (Computers) , Microcomputers
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4611 , http://hdl.handle.net/10962/d1004896 , Operating systems (Computers) , Microcomputers
- Description: This thesis describes the evaluation of four operating systems for microcomputers. The emphasis of the study is on the suitability of the operating systems for use in real-time applications, such as process control. The evaluation was performed in two sections. The first section was a quantitative assessment of the performance of the real-time features of the operating system. This was performed using benchmarks. The criteria for the benchmarks and their design are discussed. The second section was a qualitative assessment of the suitability of the operating systems for the development and implementation of real-time systems. This was assessed through the implementation of a small simulation of a manufacturing process and its associated control system. The simulation was designed using the Ward and Mellor real-time design method which was extended to handle the special case of a real-time simulation. The operating systems which were selected for the study covered a spectrum from general purpose operating systems to small, specialised real-time operating systems. From the quantitative assessment it emerged that QNX (from Quantum Software Systems) had the best overall performance. Qualitatively, UNIX was found to offer the best system development environment, but it does not have the performance and the characteristics required for real-time applications. This suggests that versions of UNIX that are adapted for real-time applications are worth careful consideration for use both as development systems and implementation systems.
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An alternative peripheral executive for the data general AOS/VS operating system
- Authors: Tennant, Robert Satchwell
- Date: 1990
- Subjects: Operating systems (Computers) , Computers
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4566 , http://hdl.handle.net/10962/d1002031
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- Authors: Tennant, Robert Satchwell
- Date: 1990
- Subjects: Operating systems (Computers) , Computers
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4566 , http://hdl.handle.net/10962/d1002031
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Initial findings of an investigation into the feasibility of a low level image processing workstation using transputers
- Authors: Cooke, Nicholas Duncan
- Date: 1990 , 2013-02-07
- Subjects: Image processing , Computer graphics , Fourier transformations -- Data processing , Transputers
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4679 , http://hdl.handle.net/10962/d1006702 , Image processing , Computer graphics , Fourier transformations -- Data processing , Transputers
- Description: From Introduction: The research concentrates primarily on a feasibility study involving the setting up of an image processing workstation. As broad as this statement concerning the workstation may seem, there are several factors limiting the extent of the research. This project is not concerned with the design and implementation of a fully-fledged image processing workstation. Rather, it concerns an initial feasibility study of such a workstation, centered on the theme image processing aided by the parallel processing paradigm. In looking at the hardware available for the project, in the context of an image processing environment, a large amount of initial investigation was required prior to that concerned with the transputer and parallel processing. Work was done on the capturing and displaying of images. This formed a vital part of the project. Furthermore, considering that a new architecture was being used as the work horse within a conventional host architecture, the INTEL 80286, several aspects of the host architecture had also to be investigated. These included the actual processing capabilities of the host, the capturing and storing of the images on the host, and most importantly, the interface between the host and the transputer [C0089]. Benchmarking was important in order for good conclusions to be drawn about the viability of the two types of hardware used, both individually and together. On the subject of the transputer as the workhorse, there were several areas whlch required investigation. Initial work had to cover the choice of network topology on whlch the benchmarking of some of the image processing applications were performed. Research into this was based on the previous work of several authors, whlch introduced features relevant to this investigation. The network used for this investigation was chosen to be generally applicable to a broad spectrum of applications in image processing. It was not chosen for its applicability for a single dedicated application, as has been the case for much of the past research performed in image processing [SAN88] [SCH89]. The concept of image processing techniques being implemented on the transputer required careful consideration in respect of what should be implemented. Image processing is not a new subject, and it encompasses a large spectrum of applications. The transputer, with image processing being hlghly suited to it, has attracted a good deal of research. It would not be rash to say that the easy research was covered first. The more trivial operations in image processing, requiring matrix type operations on the pixels attracted, the most coverage. Several researchers in the field of image processing on the transputer have broken the back of this set of problems. Conclusions regarding these operations on the transputer returned a fairly standard answer. An area of image processing which has not produced the same volume of return as that concerning the more trivial operations, is the subject of Fourier Analysis, that is, the Fourier Transform. Thus a major part of this project concerns an investigation into the Fourier Transform in image processing, in particular the Fast Fourier Transform. The network chosen for thls research has placed some constraint upon the degree of parallelism that can be achleved. It should be emphasized that this project is not concerned with the most efficient implementation of a specific image processing algorithm on a dedicated topology. Rather, it looks at the feasibility of a general system in the domain of image processing, concerned with a hlghly computationally intensive operation. This has had the effect of testing the processing power of the hardware used, and contributing a widely applicable parallel algorithm for use in Fourier Analysis. 3 These are discussed more fully in Chapter 2, which covers the work related to tbis project. The results of the investigation are presented along with a discussion of the methods throughout the thesis. The final chapter summarizes the findings of the research, assesses the value of the investigation, and points out areas for future investigation.
- Full Text:
- Authors: Cooke, Nicholas Duncan
- Date: 1990 , 2013-02-07
- Subjects: Image processing , Computer graphics , Fourier transformations -- Data processing , Transputers
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4679 , http://hdl.handle.net/10962/d1006702 , Image processing , Computer graphics , Fourier transformations -- Data processing , Transputers
- Description: From Introduction: The research concentrates primarily on a feasibility study involving the setting up of an image processing workstation. As broad as this statement concerning the workstation may seem, there are several factors limiting the extent of the research. This project is not concerned with the design and implementation of a fully-fledged image processing workstation. Rather, it concerns an initial feasibility study of such a workstation, centered on the theme image processing aided by the parallel processing paradigm. In looking at the hardware available for the project, in the context of an image processing environment, a large amount of initial investigation was required prior to that concerned with the transputer and parallel processing. Work was done on the capturing and displaying of images. This formed a vital part of the project. Furthermore, considering that a new architecture was being used as the work horse within a conventional host architecture, the INTEL 80286, several aspects of the host architecture had also to be investigated. These included the actual processing capabilities of the host, the capturing and storing of the images on the host, and most importantly, the interface between the host and the transputer [C0089]. Benchmarking was important in order for good conclusions to be drawn about the viability of the two types of hardware used, both individually and together. On the subject of the transputer as the workhorse, there were several areas whlch required investigation. Initial work had to cover the choice of network topology on whlch the benchmarking of some of the image processing applications were performed. Research into this was based on the previous work of several authors, whlch introduced features relevant to this investigation. The network used for this investigation was chosen to be generally applicable to a broad spectrum of applications in image processing. It was not chosen for its applicability for a single dedicated application, as has been the case for much of the past research performed in image processing [SAN88] [SCH89]. The concept of image processing techniques being implemented on the transputer required careful consideration in respect of what should be implemented. Image processing is not a new subject, and it encompasses a large spectrum of applications. The transputer, with image processing being hlghly suited to it, has attracted a good deal of research. It would not be rash to say that the easy research was covered first. The more trivial operations in image processing, requiring matrix type operations on the pixels attracted, the most coverage. Several researchers in the field of image processing on the transputer have broken the back of this set of problems. Conclusions regarding these operations on the transputer returned a fairly standard answer. An area of image processing which has not produced the same volume of return as that concerning the more trivial operations, is the subject of Fourier Analysis, that is, the Fourier Transform. Thus a major part of this project concerns an investigation into the Fourier Transform in image processing, in particular the Fast Fourier Transform. The network chosen for thls research has placed some constraint upon the degree of parallelism that can be achleved. It should be emphasized that this project is not concerned with the most efficient implementation of a specific image processing algorithm on a dedicated topology. Rather, it looks at the feasibility of a general system in the domain of image processing, concerned with a hlghly computationally intensive operation. This has had the effect of testing the processing power of the hardware used, and contributing a widely applicable parallel algorithm for use in Fourier Analysis. 3 These are discussed more fully in Chapter 2, which covers the work related to tbis project. The results of the investigation are presented along with a discussion of the methods throughout the thesis. The final chapter summarizes the findings of the research, assesses the value of the investigation, and points out areas for future investigation.
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Interrupt-generating active data objects
- Authors: Clayton, Peter Graham
- Date: 1990
- Subjects: Parallel programming (Computer science) Electronic data processing -- Distributed processing
- Language: English
- Type: Thesis , Doctoral , PhD
- Identifier: vital:4677 , http://hdl.handle.net/10962/d1006700
- Description: An investigation is presented into an interrupt-generating object model which is designed to reduce the effort of programming distributed memory multicomputer networks. The object model is aimed at the natural modelling of problem domains in which a number of concurrent entities interrupt one another as they lay claim to shared resources. The proposed computational model provides for the safe encapsulation of shared data, and incorporates inherent arbitration for simultaneous access to the data. It supplies a predicate triggering mechanism for use in conditional synchronization and as an alternative mechanism to polling. Linguistic support for the proposal requires a novel form of control structure which is able to interface sensibly with interrupt-generating active data objects. The thesis presents the proposal as an elemental language structure, with axiomatic guarantees which enforce safety properties and aid in program proving. The established theory of CSP is used to reason about the object model and its interface. An overview is presented of a programming language called HUL, whose semantics reflect the proposed computational model. Using the syntax of HUL, the application of the interrupt-generating active data object is illustrated. A range of standard concurrent problems is presented to demonstrate the properties of the interrupt-generating computational model. Furthermore, the thesis discusses implementation considerations which enable the model to be mapped precisely onto multicomputer networks, and which sustain the abstract programming level provided by the interrupt-generating active data object in the wider programming structures of HUL.
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- Authors: Clayton, Peter Graham
- Date: 1990
- Subjects: Parallel programming (Computer science) Electronic data processing -- Distributed processing
- Language: English
- Type: Thesis , Doctoral , PhD
- Identifier: vital:4677 , http://hdl.handle.net/10962/d1006700
- Description: An investigation is presented into an interrupt-generating object model which is designed to reduce the effort of programming distributed memory multicomputer networks. The object model is aimed at the natural modelling of problem domains in which a number of concurrent entities interrupt one another as they lay claim to shared resources. The proposed computational model provides for the safe encapsulation of shared data, and incorporates inherent arbitration for simultaneous access to the data. It supplies a predicate triggering mechanism for use in conditional synchronization and as an alternative mechanism to polling. Linguistic support for the proposal requires a novel form of control structure which is able to interface sensibly with interrupt-generating active data objects. The thesis presents the proposal as an elemental language structure, with axiomatic guarantees which enforce safety properties and aid in program proving. The established theory of CSP is used to reason about the object model and its interface. An overview is presented of a programming language called HUL, whose semantics reflect the proposed computational model. Using the syntax of HUL, the application of the interrupt-generating active data object is illustrated. A range of standard concurrent problems is presented to demonstrate the properties of the interrupt-generating computational model. Furthermore, the thesis discusses implementation considerations which enable the model to be mapped precisely onto multicomputer networks, and which sustain the abstract programming level provided by the interrupt-generating active data object in the wider programming structures of HUL.
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An adaptive discrete cosine transform coding scheme for digital x-ray images
- Authors: Mclean, Ivan Hugh
- Date: 1989
- Subjects: X-rays -- Digitization Image processing -- Digital techniques Diagnostic imaging Computer storage devices
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4567 , http://hdl.handle.net/10962/d1002032
- Description: The ongoing development of storage devices and technologies for medical image management has led to a growth in the digital archiving of these images. The characteristics of medical x-rays are examined, and a number of digital coding methods are considered. An investigation of several fast cosine transform algorithms is carried out. An adaptive cosine transform coding technique is implemented which produces good quality images using bit rates lower than 0.38 bits per picture element
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- Authors: Mclean, Ivan Hugh
- Date: 1989
- Subjects: X-rays -- Digitization Image processing -- Digital techniques Diagnostic imaging Computer storage devices
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4567 , http://hdl.handle.net/10962/d1002032
- Description: The ongoing development of storage devices and technologies for medical image management has led to a growth in the digital archiving of these images. The characteristics of medical x-rays are examined, and a number of digital coding methods are considered. An investigation of several fast cosine transform algorithms is carried out. An adaptive cosine transform coding technique is implemented which produces good quality images using bit rates lower than 0.38 bits per picture element
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Parallel process placement
- Authors: Handler, Caroline
- Date: 1989
- Subjects: Parallel programming (Computer science)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4568 , http://hdl.handle.net/10962/d1002033
- Description: This thesis investigates methods of automatic allocation of processes to available processors in a given network configuration. The research described covers the investigation of various algorithms for optimal process allocation. Among those researched were an algorithm which used a branch and bound technique, an algorithm based on graph theory, and an heuristic algorithm involving cluster analysis. These have been implemented and tested in conjunction with the gathering of performance statistics during program execution, for use in improving subsequent allocations. The system has been implemented on a network of loosely-coupled microcomputers using multi-port serial communication links to simulate a transputer network. The concurrent programming language occam has been implemented, replacing the explicit process allocation constructs with an automatic placement algorithm. This enables the source code to be completely separated from hardware considerations
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- Authors: Handler, Caroline
- Date: 1989
- Subjects: Parallel programming (Computer science)
- Language: English
- Type: Thesis , Masters , MSc
- Identifier: vital:4568 , http://hdl.handle.net/10962/d1002033
- Description: This thesis investigates methods of automatic allocation of processes to available processors in a given network configuration. The research described covers the investigation of various algorithms for optimal process allocation. Among those researched were an algorithm which used a branch and bound technique, an algorithm based on graph theory, and an heuristic algorithm involving cluster analysis. These have been implemented and tested in conjunction with the gathering of performance statistics during program execution, for use in improving subsequent allocations. The system has been implemented on a network of loosely-coupled microcomputers using multi-port serial communication links to simulate a transputer network. The concurrent programming language occam has been implemented, replacing the explicit process allocation constructs with an automatic placement algorithm. This enables the source code to be completely separated from hardware considerations
- Full Text: